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חומרה

Experienced Backend Design Engineer

272376
Requirement:

We are looking for experienced BE engineer to work with us on Synopsys
flow. 
Experience in running full flow from synthesis to P&R. 
Working in block level and chip level.

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What You'll Do
You'll be joining our Back End Design team, which is responsible for the
entire BE development process RTL to GDS, leading development of high quality
VLSI designs.

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We are looking for experienced VLSI design engineers to join the development
of our products .
The position involves participation in all the development stages, from
initial definitions, through architecture level definition and implementation
of complex designs and up to deliver the highest qua

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Modeling Engineer for Modem Architecture

531325
Work with multi-disciplinary teams (local and international) in various
areas:

SW/FW Development
RTL Design
Design Verification
System Architecture
Modem Architecture
Develop HW Architecture specifications for Modem IPs and subsystems
Drive projects execution in VLSI, SW, FW, Pre/Post Silicon acti

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We are looking for an experienced and creative processor VLSI design Engineer
to architect, design and implement the core of our next generation processors
Education:
• B.Sc.

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Digital Design and Back-End Engineer

257150
 The Group 
The Sensor Products Design team (MVP) is facing BPC, Remosiac, WDR, Depth,
Shallow Depth of Field, Motion Detection and many more ISP & Computer Vision
and System architecture challenges.

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Work on advanced SoCs for image processing computer vision and AI
applications.
Go through ALL stages in chip design: micro architecture, RTL coding, formal
verification, verification and debug, support backend, timing, area and power
optimization, design for test, package design support, test pa

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Description:    

RTL2GDS closure at advanced node technologies with focus on power / IR-drop
optimizations   
Develop power and signal integrity flows using full system models (Die /
Package / PCB)   
Work closely with System, Design, DFT teams   
Location: Caesarea / Tel Aviv 

Requirements:    

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Job description: 

Performing Power analysis and power estimation of digital designs (RTL & Gate
level) 
Performing power optimizations using different techniques and different
tools 
Supporting Power Aware verification at RTL/Gate level 
Define and develop power-intent files (like UPF) for multi-

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Job Description:
In your role you will be responsible for Developing understanding of the
design architecture and contributing at multiple levels on the
micro-architecture features and specification.

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● Be part of a development of a novel massively parallel processor
architecture. This is a technical, hands-on role
● You will be responsible for designing blocks of a multi-core ASIC.

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Qualifications
• BSc in Electrical Engineering
• At least 9 years experience in digital design physical implementation and
verification.
• Good knowledge of physical design implementation techniques.
• Good knowledge and understanding of digital design timing.
• Good scripting capabilities. 

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Senior VLSI Architect

204255
This job requires a collaboration with multiple engineering teams in various
geographical locations to define requirements, interfaces, 
interaction between SW and HW blocks, performance analysis, and more.
Minimum Qualifications:
Knowledge and experience in high-speed interfaces, such as PCIe, Sto

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Requirements:

BSc/MSc in Electrical Engineering/Computer Engineering from known
university  
At least 5 years of experience as a Digital Designer   
Vast knowledge in design and verification tools and methodologies  
Experience with Verilog/ VHDL RTL coding 

Advantages:

Experience with System-le

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Hardware & FPGA Engineer

146147
 Job Description (or: What Will Your Job Look Like?) 
· You will be a part of a new project design team in a multidisciplinary
company. 
· Logic design of sophisticated blocks with Xilinx technology (FPGA
and SOC in VHDL) 
· Responsibility for successful integration of a data path board with
other d

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