{[{title}]}
חומרה
Physical design lead with experience in advanced nodes implementation of unit
level and Full chip and methodologies in her/his role will require to build
full flow which include synthesis , P&R and signoff , execute unit level and
full chip implementation

Advantages: working with ASIC vendors  

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Physical Design / Backend Engineer

463571
· B.Sc./M.Sc. in Electrical Engineering with high GPA 
· >4 years of experience with RTL2GDS flow (ICC2/Innovus) with STA closure
 
· >3 years of experience in Full Physical verification flow (DRC/LVS/DFM)
with ICV/CALIBRE 
· >2 years of experience in Developing BackEnd flow and methodologies...

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● Be part of a development of a novel massively parallel processor
architecture. This is a technical, hands-on role
● You will be responsible for designing blocks of a multi-core ASIC.

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We are looking for experienced VLSI design engineers to join the development
of our products .
The position involves participation in all the development stages, from
initial definitions, through architecture level definition and implementation
of complex designs and up to deliver the highest qua

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Job description: 

Performing Power analysis and power estimation of digital designs (RTL & Gate
level) 
Performing power optimizations using different techniques and different
tools 
Supporting Power Aware verification at RTL/Gate level 
Define and develop power-intent files (like UPF) for multi-

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Physical design and Frontend digital design Engineer

785597
Requirements: 
•graduate of  B.Sc. or M.Sc. in electrical/communication engineering,
computer science or equivalent, average grade >82 
•Passion for complex HW and SW platforms, networking and power management
in cutting edge technologies  
•Self-learner, able to understand specifications and...

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2-3 years experience with RTL 2 GDS flow 
Experience with 2 or more full SoC cycles; taking the design from the RTL
phases to GDSII. 
Knowledge of Full Flow Cadence and/or Synopsis tools (both flows –
advantage). 
Excellent debugging skills 
Script writing skills with TCL/Python/SED/AWK  

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What You'll Do
You'll be joining our Back End Design team, which is responsible for the
entire BE development process RTL to GDS, leading development of high quality
VLSI designs.

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Senior VLSI Architect

204255
This job requires a collaboration with multiple engineering teams in various
geographical locations to define requirements, interfaces, 
interaction between SW and HW blocks, performance analysis, and more.
Minimum Qualifications:
Knowledge and experience in high-speed interfaces, such as PCIe, Sto

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We are looking for an experienced and creative processor VLSI design Engineer
to architect, design and implement the core of our next generation processors
Education:
• B.Sc.

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Requirements: 



BSc in Electrical/Computer Engineering. 
More than 3 years of experience as Physical Design engineer. 
Experience in Synthesis and Implementation. 
Advantage is knowledge in: DFT, DRC, LVS, LEC, Power. 
Advantage for Cadence tools experience. 
Thinker, team player and motivated.  

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Digital Design and Back-End Engineer

257150
 The Group 
The Sensor Products Design team (MVP) is facing BPC, Remosiac, WDR, Depth,
Shallow Depth of Field, Motion Detection and many more ISP & Computer Vision
and System architecture challenges.

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Work on advanced SoCs for image processing computer vision and AI
applications.
Go through ALL stages in chip design: micro architecture, RTL coding, formal
verification, verification and debug, support backend, timing, area and power
optimization, design for test, package design support, test pa

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Modeling Engineer for Modem Architecture

531325
Work with multi-disciplinary teams (local and international) in various
areas:

SW/FW Development
RTL Design
Design Verification
System Architecture
Modem Architecture
Develop HW Architecture specifications for Modem IPs and subsystems
Drive projects execution in VLSI, SW, FW, Pre/Post Silicon acti

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Hardware & FPGA Engineer

146147
 Job Description (or: What Will Your Job Look Like?) 
· You will be a part of a new project design team in a multidisciplinary
company. 
· Logic design of sophisticated blocks with Xilinx technology (FPGA
and SOC in VHDL) 
· Responsibility for successful integration of a data path board with
other d

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