Requirements
BSc in Electronics engineering/communication system engineer/ Computer Engineering from a leading University.
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Looking for outstanding Engineers to join the development of new Wi-Fi and Automotive SoC products.
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The job will include :
• Handling RTL design for new blocks and legacy blocks,
• Supporting chip integration
• Involvement in Block level synth, CDC, lint, integrating and supporting DFT structures.
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• Education: graduate or student (4th year)
Computer or Electrical engineer (BSC)
• Experience:
• Graduate or 4th year student
• Experience with system-verilog/verilog is an advantage
• Ability for self-learning, with high enthusiasm to learn
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דרישות המשרה
השכלה: B.Sc בהנדסת חשמל /אלקטרוניקה ממוסד אקדמי מוכר.
5 שנות ניסיון ומעלה בפיתוח וכתיבת קוד עבור מודולים דיגיטליים ב-Verilog / System Verilog.
• Micro-architecture (Definition)
• Circuit design
• Digital Verification
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JOB DESCRIPTION
• FPGA/ASIC design, doing the full cycle from architecture, through design and integration, and up to customer deployment.
• Logic design, verification, synthesis and physical implementation.
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Our Chip Design department is looking for brilliant VLSI Design Engineers to join the team!
In this role you’ll take part of RTL coding of new IPs and SoC integration.
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Responsibilities:
you will have responsibilities of top level and/or complex blocks of a SOC, across all phases of Front-End design, including micro-architecture specification, RTL code development, debug of complex logic in high performance, and low power design.
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Job Description:
Block owner in a WiFi chip set including micro-architecture and logic design.
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Requirements:
• BSc. in Electrical/Communication/Computer engineering from university - Must.
• experience in Frontend design – Must
• Familiarity with RTL to GDSII full flow implementation – Advantage
• Backend experience - Advantage
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Technical Knowledge:
• Knowledge in Verilog and System Verilog
• System view oriented – manages to see the full picture
• Integration experience - advantage
• Good understanding of Networking and the switching packet walk through - advantage
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Job description:
• Experienced security architect working with both external and internal parties on security architecture of future company products.
• Review of external chip vendors’ security architecture
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A hi-thech copmpany in the north looking for a Chip Design Engineer
Job description
• Development of mini-architectural of major modules in the IC, design & verification.
• Drive the process of RTL design and debug.
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Senior Chip Design Manager
Responsibilities:
Leading the next generation state of the art Satellite SoC activity through the full life cycle: from architecture to design and until production. Drive to completion of projects on time and within budget. Including methodologies and tool...
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Requirements:
• Experience of 3 years in RTL design and/or micro-architecture, preferably of networking silicon such as NIC, Switch
• Knowledge of Verilog, logic design principles along with timing, area and power implications
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