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חומרה

Digital ASIC Design Integrator Engineer

118019
 As a digital ASIC design integrator engineer you will be directly
responsible for the chip top level integration. You will be the point of
contact for members of the design team as well as members of other teams,
such as analog engineers, physical designers and HW engineers.

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For our Remote PHY Full Duplex chip, We look for talented, highly qualified
Design engineer:
• Education Bsc in Electrical Engineering• Experience in PHY, DSP And
Digital Communication• Experience in writing RTL for Modem• Experience in
reading standards and come with the optimal
Architecture/Im

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IP Design and integration Leader

116927
Responsibilities:
Design lead for digital ASIC chips.
Define hardware specification and Micro Architecture.
Execute top level integration of complex SoC designs.
Work closely with physical design team to optimize implementation and meet
design constrains.
Define and implement DFT Architecture.

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Key Qualifications
VLSI design experience in SoC for consumer applications – an advantage
Familiar with the various backend tools (synthesis and STA)
Familiar with advanced design practices (Clock/Voltage domain crossing, DFT
and Low Power Design)
Familiar with verification methodologies
Strong Ver

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Classic VLSI engineers
VLSI designers with 5-10 years of experience, hands on
Front end  
 

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Responsibilities:
Design lead for digital ASIC chips.
Hands on involvement in design tasks.
Define hardware specification and Micro Architecture.
Work closely with physical design team to optimize implementation and meet
design constraints.
Define and implement DFT Architecture.

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We are looking for exceptional, team player engineer to join our DFT team and
help up develop the future of AI.
Being involved in all ASIC’s process – starting from planning, through
Architecture, design and verification development and finally bring-up.

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SOC ASIC Design Engineer

116845
Responsibilities:
Take part in all aspects of digital design – from architecture and
specification, RTL design and verification
Close collaboration with the Physical Design team, and supporting SW and
Production teams.
Contribute to the development of a very complex state-of-the-art
technological

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Required skills & experience:
• Engineering degree
• Minimum of 3-5 years experience of ASIC and/or FPGA development
• Good experience of Verilog/VHDL
• Knowledge of synthesis and static timing analysis tools would be a bonus
• Experience of implementing digital signal processing modules would be a

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Hardware Designer & Micro-Architect

115558
Job Description:
Design AI modules for high-speed neural network training and be a Focal point
between AI research team and hardware designers.
See the “big picture” - Translate high-level architecture schemes into
design tasks.
Identify and solve performance bottlenecks
Design-for-testability
Dev

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Requirements:
 
Bsc. In electrical engineering / Computer science from known university
3+ years of experience in of FPGA or ASIC design, verification and
implementation.
Knowledge in the following languages:
Verilog, VHDL
System Verilog
Perl, Python
Familiarity with Vivado and Questa - an...

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VLSI Architecture and Validation System Engineer

116960
Minimum qualifications:
B.Sc in EE/CS with 5+ years of relevant experience.
Experience in VLSI design and verification
Experience in Embedded SW/FW development
Excellent communications skills and matrix organization team player  
Ability to interpret complex and incremental design documentation, dat

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Digital Design Engineer

116798
What will you do?
Work with cross-functional teams to develop hardware architecture for next
generation systems.
Design, implement, debug and characterize embedded systems.
Lead new design concepts through exploration, prototyping, development, and
into mass production.
Collaborate with other team

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you will have responsibilities of top level and/or complex blocks of a SOC,
across all phases of Front-End design, including micro-architecture
specification, RTL code development, debug of complex logic in high
performance, and low power design.

Requirements:
2-4 years hands-on RTL coding in

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BSc in Computer science/ Electrical engineering from known University –
Must.
 8+ years of experience in VLSI design – Must.
 At least 3 years of experience as team leader or team manager – Must.
 Deep knowledge in Verilog – Must.
 Experience in micro-architecture and design of complex blocks – Mus

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