you will have responsibilities of top level and/or complex blocks of a SOC, across all phases of Front-End design, including micro-architecture specification, RTL code development, debug of complex logic in high performance, and low power design.
3+ years experience as a designer
Experience in writing RTL for Modem
Experience in reading standards and come with the optimal Architecture/Implementation
Experience in Chip level integration is an advantage
השכלה: B.Sc בהנדסת חשמל /אלקטרוניקה ממוסד אקדמי מוכר.
5 שנות ניסיון ומעלה בפיתוח וכתיבת קוד עבור מודולים דיגיטליים ב-Verilog / System Verilog.
• Micro-architecture (Definition)
• Circuit design
• Digital Verification
At least 3 years of hands-on experience in Program Management roles
Closely familiar with ASIC design flow
At least 8 years of hands on experience as VLSI/System engineer
• 3 years in silicon design.
• Knowledge\experience in the full design tool chain including coding, verification, synthesis and up to T.O and post silicon activities.
A hi-thech copmpany in the north looking for a Chip Design Engineer
• Development of mini-architectural of major modules in the IC, design & verification.
• Drive the process of RTL design and debug.
Block owner in a WiFi chip set including micro-architecture and logic design.
Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.
• BSc. in Electrical/Communication/Computer engineering from university - Must.
• experience in Frontend design – Must
• Familiarity with RTL to GDSII full flow implementation – Advantage
• Backend experience - Advantage
The position includes:
•Micro-architecture and documentation.
•Top level integration of complex SOC designs.
•Synthesis and STA.
• Education: graduate or student (4th year)
Computer or Electrical engineer (BSC)
• Graduate or 4th year student
• Experience with system-verilog/verilog is an advantage
• Ability for self-learning, with high enthusiasm to learn
Senior Chip Design Manager
Leading the next generation state of the art Satellite SoC activity through the full life cycle: from architecture to design and until production. Drive to completion of projects on time and within budget. Including methodologies and tool...
We are looking for an Experienced Electrical Engineer to take part in the Pre and Post silicon activities of our next generation network products:
• To deal with physical and real worlds challenges and constraints.
• Experience of 3 years in RTL design and/or micro-architecture, preferably of networking silicon such as NIC, Switch
• Knowledge of Verilog, logic design principles along with timing, area and power implications
• B.Sc. in Computer / Electrical engineering from a well-known institute
• At least 7 years of VLSI front end design experience
• Ability to define block micro-Architecture under system-level requirements
• Experience with ASIC synthesis and STA flows