VLSI Verification Team Leader

Requirements
Education: BSc in Electronics engineering from a leading University.
Experience:
3 + years of experience in the Verification of advanced and complex ASIC RTL Designs.
3 + years of experience in leading an ASIC Verification Team in verification planning, design of reference models, generators, checkers and monitors, and definition and completion of functional and code coverage.
Advantages:
Experience in: Specman, System-Verilog, Python, Perl & TCL scripts in Linux
Experience in processor verification or memory subsystem verification
Experience in formal verification technics