חומרה

VLSI Verification Engineer

650311

תאריך עדכון

01/05/2022

תיאור המשרה

We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in an early-stage start-up. Taking full ownership of an entire domain, planning the verification strategy, writing and executing test plan in system verilog UVM from scratch.

Requirements:

• 3+ years of experience as a Verification Engineer.

• B.Sc./M.Sc. degree in electrical/computer engineering from research university

• Experience in pre-silicon functional unit level verification.

• Experience in System Verilog UVM.

• Experience in verification of complex SoC and designs.

• Experience with CPU subsystem, AXI, DMA, DDR, NOC – is an advantage

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