חומרה

VLSI Verification Engineer

388223

תאריך עדכון

22/09/2021

תיאור המשרה

Requirement: 

  •  B.Sc. in Electrical/Computer Engineering 
  • Up to 5 years of experience as a VLSI Verification engineer  
  • System Verilog language expertise   
  • UVM expertise   
  • Familiarity with Software Development skills (like Object Oriented Programming)  

Advantages:  

  • Familiarity with Mixed Signal   
  • Familiarity with Formal Verification tools (like Jasper)  
  • Close familiarity with python, Git, Unix-like environment  
  • Knowledge of proteanTecs different disciplines – transistor-level physics, circuit design, machine learning techniques and objectives  
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