• Object Oriented based verification of ASIC design.
• VLSI chip integration.
• Working with version control tools and scripting environments.
Experience / Knowledge in Keywords
• B.Sc in EE, SW Eng or computer .
• 2-3 year’s experience in Verification
• Object/Aspect Oriented programming at a very good level
• System Verilog/”e”/C++
• VLSI design- Verilog/VHDL - an advantage
• Scripting language- perl/tcl/csh/python ,VMM verification experience - an advantage