Job Responsibilities:
Marvell is offering a great opportunity to join the Switch IP department and be part of our IP development for the next generation Switch.
As a verification engineer in the IP department you’ll join our experienced team and own verification activities of ASIC/VLSI complex IP.
You will experience unit level and cluster level verification activities.
Our development engineers work with architects to influence the unit architecture, plan and implement verification environment in UVM, and execute the verification plan until quality criteria is met.
Our sites are located in Yokneam and Petach-Tikve.
Requirements:
• Electrical engineering B.Sc graduate
• At least 3 years verification experience in SV, UVM
• Programming knowledge
• Good learning skills
• Problems solving skills
• Ability to be a part of a team, working in cooperation
