Responsibilities
End-to-end system lead: define pipelines, hold code and design reviews, and drive development of critical features or blocks
Define design specifications with the larger team and develop implementation strategies and ways to meet quality, and schedule goals
Work closely with Memory System, Firmware, ASIC, and Validation stakeholders to make design decisions and achieve the highest performance product
Lead the evaluation of design IPs in order to reach product goals
Minimum Qualifications:
BSc degree in EE, Computer Engineering, or equivalent practical experience
Cross-functional experience in Computer Architecture, Design, Verification, Subsystem architecture specifications and Physical Design
Experience in design and technical leadership of high-speed interfaces
Preferred Qualifications:
Experience in architecture and micro-architecture development of complex system pipelines, interconnects, and memory subsystems
Experience working closely with physical design teams to develop interfaces optimized for low-power, and high performance
Experience working with firmware teams to define the HW/FW interface including pipelines, efficiency, and error handling
