As part of your role you will:
Define memory system, AXI based NOC, ARM/ARC subsystems, peripheral interfaces, virtualization solution including MMU, secure boot, reset flow and debug infrastructure.
Driving improvements in power consumption, area, time to market, yield, and performance
Work closely with design and integration teams to implement and verify the SoC
Work closely with Linux kernel driver and FW teams to provide ASIC PRMs
Provide ASIC requirements to board design
Support post silicon bring-up and debug activities.
Key requirements:
BSc degree in Electrical Engineering or equivalent similar experience.
10+ years (BS), 8+ years (MS), 5+ years (PhD) Experience in SoC architecture
Experience in heterogeneous SoCs, NoC interconnects, memory subsystems, PCIe interface, secure boot flows and debug infrastructure
Strong background in VLSI design and verification
Knowledge of programming languages such as C/C++ and Python
Advantages:
Knowledge of Memory systems (DDR/HBM) and system-level QOS
Knowledge of chip-to-chip interfaces
Knowledge of AI Accelerations and DSP
