Senior verification Team Leader

תחומי אחריות:    
Bachelor’s degree in Computer Science/Electrical Engineering – mandatory 
5 years of experience in defining and implementing 0verification environments in Specman/eRM or SystemVerilog/UVM environments 
Good communication skills and teamwork – mandatory 
Proven experience in a managerial position – advantage
Experience with scripts (Python or Bash), SOC environments, formal verification, Palladium, gate level simulations – advantag.