Requirements
- B.Sc /M.Sc. graduates in Electrical Engineering from a leading University.
- At least 5-6 years of experience in Verification.
- Knowledge of SV-UVM, Specman and C++.
- Self-motivated and self-directed, proactive.
- Ability to achieve results in a fast moving, agile flow and dynamic environment, both locally and across the organization.
- Ability to troubleshoot and analyze complex problems.
- Great communication skills.
- Team player.