Job Description:
In charge of planning (architecture) and developing (coding) all the needed simulation environments for tests and debugs.
The simulation environments are used to develop new RTL blocks, Full-chip integration, FPGA code and also to debug and resolve bugs found.
Job Requirements:
BSC in Electrical Engineering – from a well-known university
At least 5 years’ experience
Knowledge in Specman – an advantage
Knowledge in UVM – an advantage