Senior Test Engineer

Responsibility:
– Test program development for VSLI/ASIC
– H/W design for production test and reliability  
– Projects management  
 
Education:
– Bachelors/Master of Science in Electronics or Electrical Engineering    
– Digital/Mixed signal classes for ATE (ADVT93K is preferable)
    
Knowledge
– developing TPD on one of the systems: Advantest (93K), Teradyne (Ultra-Flex, J750)
– Circuit design   
– Board design environment (ORCAD is preferable)    
– C, C++ programming   
– Digital and Mixed signal test theory   
– Reliability stress theory   
 
Experience:
– Minimum 4 years of Test program development (TPD) TPD
– Load board electrical design
– High temperature environment circuit design
– TP debugging
– External measurement equipment usage (oscilloscopes, logic analyzer, RF equipment)
 
Skills:
– The candidate should be self-motivated, creative and proactive, to work successfully in a fast-paced environment including multiple platforms and architectures   
– The candidate will work closely with developers     
– Capability to work individually and as a member of team.