Senior Layout Engineer

Senior Layout Engineer
We are looking for senior layout engineer to develop the next generation products for the mobile world. The work includes both individual work on very high speed chip design ad team work with analog engineers.
Work is from the single transistor, inductors, P-Cells, block level, full chip and integration with package. It needs deep understanding in all the design aspects including DRC, LVS, Antenna, aging, matching etc..
The work is with global teams that developing the future of the chip design industry.
The following skills are required:
1. Electrical engineers or practical engineer degree
2. At least 10 years of layout work on chip design
3. Advanced process experience
4. High expertise in Cadence Virtuoso including hands on polygon push, automation, L, XL, GXL work
5. IR Drip, Parasitic extraction and reduction, DRC, LVS, Antenna, Aging, high frequency, power grids
6. Analog and RF frequency work
7. Ability to solve CAD issues advantage