Responsibilities:
Develop Digital and Mixed Signal test programs and test hardware for CP/FT manufacturing testing.
Device characterization.
Device qualification.
Monitor yields and target cost reduction efforts via test-time reduction.
Silicon failure analysis.
Requirements:
BS.c. or MS.c. in EE degree from recognizable universities with a proven track record of product development to high volume production.
4-6 years of experience in mixed-signal SOC test development.
Good understanding of characterization techniques and test development fundamentals for mixed-signal IC’s.
Solid understanding of DFT test techniques like Scan, JTAG, BIST and other Ad-hoc techniques.
Proficiency in test vector generation, verification and conversion tools.
ATE load board and probe card design.
Experience of using data analysis tools for IC characterization.
Ability to lead the test-development effort within the organization.
The candidate must be self-starters and be able to work in a fast paced, multi-tasking environment.
