Experienced Backend Design Engineer

Requirement:
We are looking for experienced BE engineer to work with us on Synopsys flow. 
Experience in running full flow from synthesis to P&R. 
Working in block level and chip level. Running LVS & DRC checks and doing the cleanup. 
Experience in implementing ECOs 
4+ years of experience in chip BE work 
Experience in Synopsys flow: DC (Design Compiler), ICC1/2 PT (Prime Time) 
Chip finishing – LVS DRC – Run and clean 
Formality knowledge is an advantage 
TCL scripting experience