• Develop AI modules for high-speed neural network training.
• Including all stages of development: Micro-architecture, Coding, Verification,
Synthesis, and timing closure.
• Identify and solve performance bottlenecks.
• B.Sc. in EE from Technion/TAU/BGU
• Experienced VLSI designer ASIC/FPGA – 5 years min.
• Familiar with Verilog, Python.
• Familiar with verification methodologies and tools