As a digital ASIC design integrator engineer you will be directly responsible for the chip top level integration. You will be the point of contact for members of the design team as well as members of other teams, such as analog engineers, physical designers and HW engineers. We are looking for an experienced ASIC design integration engineer with a proven record of ASIC tape-outs, with excellent analytical and technical skills.
Responsibilities:
Execute top level integration of complex SoC designs.
Work closely with physical design team to optimize implementation and meet design constraints.
Define and implement DFT Architecture.
Requirements:
Proven record of ASIC tape-outs as full chip integrator.
B.Sc./M.Sc. in Electrical Engineering from a leading university.
At least 5 years of experience in complex ASIC design.
Proficiency in synthesis and STA tools.
Experience with ATPG, MBIST tools.