Design, implementation and maintenance of the verification environment, verification planning, test development and test debug.
• 6+ years of experience in Chip Design/ Verification with strong software background.
• Strong programming expertise in Specman/ C++/ System Verilog(UVM)/ SystemC.
• B.Sc in Computer Science/ Engineering/ Electrical Engineering/ Communication Systems Engineering - a must, higher degree in technical related field - an advantage.
• Experience in Wi-Fi IEEE 802.11., Microprocessor verification, Network processor verification, TCP/IP networking, GPON/EPON, Emulation/ test-bench acceleration, Formal verification (Jasper/Rulebase), EDA tools development - an advantage.