Analog Layout Practical engineer

Qualification:
B.Tech in Electronics
3+ years of experience as Analog Layout practical engineer
Key Skills:
Analog IC Layout
DRC/LVS/Antenna
Experience on advanced process nodes (preferred)
CMOS device physics and fabrication knowledge (preferred)
Perl or tcl and Shell scripting (prefered)
Responsibilities and requirements:
Work on custom layout Analog IPs like BG, ADCs, Voltage Reference Generators, and standard cells
Perform verification checks like DRC/LVS/Antenna and fixing violations
Work closely with the design engineers and successfully delivering Analog Layouts
Experience in using Cadence Virtuoso or Synopsys Layout Editor, Mentor Graphics Calibre or ICV verification tool
Understanding of circuit principles as affected by layout such as speed, capacitance, power, noise and area